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seems to be lptim1,2,3 are commonly available to all H7

Signed-off-by: Manojkumar Subramaniam [email protected]

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@manoj153 Have you been able to verify LPTIM1 behavior on STM32H7?

Comment on lines 711 to 734
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Please remove as there is no code to support LPTIM instances other than LPTIM1

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@manoj153 Have you been able to verify LPTIM1 behaviour on STM32H7?

@erwango following up on this, can I say the easiest method to test is to try using LPTIM1 as sys clock?

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Exact

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@erwango tested with my WIP H7 board, #39295, seems working the blinky example, console output from sample
west build -b nucleo_h7a3zi_q samples/boards/stm32/power_mgmt/blinky/ -p

*** Booting Zephyr OS build v2.7.99-421-ge7612de315b3  ***
Device ready

Let me know if this indicates h7 LPTIM1 test pass?

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also, I wonder why when PM is enabled, there is no sanity check as such if lptim1 is okay?

Is that intended or missing from sight?

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also, I wonder why when PM is enabled, there is no sanity check as such if lptim1 is okay?

We could imagine other implementations than having LPTIM1.
So, even if this is true today, this might not be always the case and users may have some other implementation out of tree so I don't think this is really required.

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@manoj153 manoj153 Oct 13, 2021

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Let me know if this indicates h7 LPTIM1 test pass?

Best way is to run timer API test

@erwango just to confirm, are you referring to this test
https://github.com/zephyrproject-rtos/zephyr/tree/main/tests/kernel/timer/timer_api ?

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Yes

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@erwango sorry I may wrongly press for re-request for review. kindly ignore for this time

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@erwango few updates

*** BootinASSERTION FAIL [0] @ WEST_TOPDIR/zephyr/drivers/timer/sys_clock_init.c:23
E: r0/a1:  0x00000004  r1/a2:  0x00000017  r2/a3:  0x00000001
E: r3/a4:  0x0000000f r12/ip:  0x00000000 r14/lr:  0xfffffffd
E:  xpsr:  0x4100000f
E: Faulting instruction address (r15/pc): 0x0800d396
E: >>> ZEPHYR FATAL ERROR 4: Kernel panic on CPU 0
E: Fault during interrupt handling

E: Current thread: 0x24000568 (main)
E: Halting system

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@manoj153 Have you been able to verify LPTIM1 behavior on STM32H7?

I'll do a test and share soon. I don't have a supported board to do it, I am adding a new board support once that is ready.

@erwango erwango added the block: HW Test Testing on hardware required before merging label Sep 30, 2021
@erwango erwango added this to the v3.0.0 milestone Sep 30, 2021
lptim1 is available on all H7

Signed-off-by: Manojkumar Subramaniam <[email protected]>
@manoj153 manoj153 changed the title dts: arm: st: h7: add lptim1,2,3 dts: arm: st: h7: add lptim1 Oct 13, 2021
@manoj153 manoj153 requested a review from erwango October 13, 2021 16:44
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This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time.

@github-actions github-actions bot added the Stale label Dec 13, 2021
@github-actions github-actions bot closed this Dec 27, 2021
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